The present invention relates to a semiconductor device and a method of manufacturing the same, in particular, to a semiconductor device having a lateral element.
For semiconductor elements used as a switching driver, lateral high-breakdown-voltage MOS (metal oxide semiconductor) transistors have been used popularly. A lateral high-breakdown-voltage MOS transistor is disclosed, for example, in Japanese Patent Laid-Open No. 2011-66067 (Patent Document 1). In the lateral high-breakdown-voltage MOS transistor disclosed in Patent Document 1, a hollow formed in an element isolation trench contributes to an increase in breakdown voltage.
In addition, the semiconductor device disclosed in Japanese Patent Laid-Open No. 2007-258501 (Patent Document 2) and having a high-breakdown-voltage p type MOS transistor is formed on a so-called SOI (silicon on insulator) substrate and it has a dielectric isolation trench for element isolation around the p type MOS transistor.
Further, a lateral high-breakdown-voltage MOS transistor formed on an SOI substrate and having a dielectric isolation trench for element isolation is disclosed in Japanese Patent Laid-Open No. Hei 8 (1996)-64686 (Patent Document 3).
The semiconductor devices disclosed in the above-mentioned patent documents have, along the main surface of the semiconductor substrate thereof, a so-called buried layer in which an impurity region has been buried in the semiconductor substrate.    [Patent Document 1] Japanese Patent Laid-Open No. 2011-66067    [Patent Document 2] Japanese Patent Laid-Open No. 2007-258501    [Patent Document 3] Japanese Patent Laid-Open No. Hei 8 (1996)-64686